The present invention relates generally to radiation shielding and, in particular, to an apparatus for shielding an electronic component against space environment radiation.
Advances in commercial off-the-shelf microelectronics offer lower cost, reduced weight, i.e., smaller lift vehicles, and increased availability for military and commercial satellite systems. To take advantage of commercial off-the-shelf devices, the significant issue of radiation tolerance must be addressed. The effects of the natural space radiation environment on electronics can be divided into two main categories:
1) Total ionizing dose irradiation is caused by trapped electrons and protons in the earth's magnetosphere. This phenomena creates charge build up in the oxide and other materials used to process semiconductor devices, affecting circuit operating performance, leakage current, and other parametric and functional characteristics. The total ionizing dose is dependent on the altitude of a satellite. Even prolonged operation in a Low Earth Orbit (LEO) can present significant problems for non-hardened devices, which can fail at radiation levels less than 10 krads. A minimum total ionizing radiation requirement of 30 kreds is typical for LEO satellite hardness. Third world nuclear threats are also of concern for LEO environments. Low yield fission weapons can release a substantial amount of ionizing radiation (electron cloud) in the LEO Van Allen Belts, causing premature degradation and failure due to accumulation of total dose radiation from beta electrons. PA1 2) Single Event Upset (SEU) is caused by the impact of heavy ions from galactic cosmic rays (GCR) or solar energetic particle (SEP) events. This phenomena will deposit charge in semiconductor devices, causing devices to upset, burnout or latchup. Protection against this type of radiation requires specialized rad-hard processes and designs in the fabrication of devices, or system-level error detection, correction and/or recovery methods. Shielding is not effective against this type of radiation.
Current approaches for hardening ICs against total dose radiation involve: (1) design and process modifications to achieve radiation hardening in the semiconductor devices, or (2) shielding of microelectronic packages, card assemblies, or satellite skins with metal of sufficient thickness to absorb the radiation. For example, it has been proposed to shield a group of circuit boards by placing a tantalum skin around them. It has also been proposed to shield individual chips by placing a first piece of tungsten over the chip and a second piece below the chip. The first approach results in a significant cost increase for the ICs, and limits the availability to a few suppliers of radiation hardened ICs. The second approach results in a significant increase in the weight of the system, as well as increased costs relative to conventional packaging approaches. The use of shielded IC packages is also limited to expensive, military qualified, ceramic packages. Thus, a need exists for a low cost, lightweight method of enhancing the radiation tolerance of ICs for a variety of space environments. Ideally, this method can be universally applied to a variety of ICs and packaging approaches.